Alif Semiconductor /AE722F80F55D5LS_CM55_HP_View /LPGPIO /GPIO_CONFIG_REG2

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Interpret as GPIO_CONFIG_REG2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ENCODED_ID_PWIDTH_A 0ENCODED_ID_PWIDTH_B 0ENCODED_ID_PWIDTH_C 0ENCODED_ID_PWIDTH_D

Description

Module Configuration Register 2

Fields

ENCODED_ID_PWIDTH_A

7 (Val_0x7): Port is 8 bits wide

ENCODED_ID_PWIDTH_B

Reserved for multi-port configuration

ENCODED_ID_PWIDTH_C

Reserved for multi-port configuration

ENCODED_ID_PWIDTH_D

Reserved for multi-port configuration

Links

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